Building on the past
Let’s take a step back and see how the existing distribution architecture could evolve to meet the AI challenge. Traditionally, AC is supplied to each rack and then rectified to circa 50 V DC which is bussed to the shelves, where a further unregulated rail at a typical 12.5 V or 6.25 V output at 50Vin is generated at the card level. This, in turn, feeds Voltage Regulator Modules (VRMs) very close to the processors. This arrangement keeps the highest-current paths at the processor’s sub-1 V level as short as possible, minimizing voltage drop and interconnect losses while supporting a good response to transient loads. Backup batteries can conveniently connect to the 50 V bus. For workloads with a relatively low peak-load duty cycle, bus converters can be specified with a lower continuous or thermal power rating, with a time-limited peak rating.
So, what levers can a systems designer pull to make the arrangement suitable for AI loads? The choice of card-level bus is important. With a 54 V input, a fixed 4:1 converter produces a nominal 13.5 V bus, while an 8:1 converter produces 6.75 V. The 8:1 option carries more current on the intermediate bus, increasing conduction losses, but its lower output voltage can reduce switching losses in the downstream VRM. Overall system efficiency therefore depends on the operating point and the characteristics of both conversion stages.
A VRM operating from a nominal 12 V input generally incurs higher switching losses than one operating from a lower input voltage, although the lower input current can reduce conduction losses in parts of the power path. Calculating conversion efficiency for continuous high AI loads therefore means closer scrutiny of the converter datasheets, considering actual loads and bus voltage variation. Another consideration is bus capacitance for transient load ride-through. For the same stored energy and proportional voltage excursion, a 13.5 V bus requires about one-quarter of the capacitance needed at 6.75 V, although the reduction in physical capacitor volume will depend on voltage rating, ESR and ripple-current requirements.
With load steps at varying duty cycles, thermal considerations come to the fore. Bus converters and VRMs have continuous and transient power ratings dependent on the heat sinking applied, ambient temperature and the amplitude, duration and duty cycle of load transients. If a peak load is repeated too rapidly, the converter does not necessarily have time to return to thermal equilibrium between transients. It therefore begins each successive transient at a higher internal temperature, potentially leading to thermal shutdown. However, in AI servers, liquid cooling will typically be used for the processors and may also be available to cool the VRMs and bus converters efficiently.
Finding the right match within the Flex BMR family
While the trend is for non-isolated, unregulated bus converters for their high efficiency and small size, isolated regulated versions are also available: the through-hole BMR491, delivering up to 1.54 kW continuously and 2.45 kW at peak load. The model features a Hybrid Regulated Ratio scheme in which the output follows the input-voltage ratio below a defined threshold and is regulated above it. This keeps the output within a narrower range, allowing the downstream VRM to operate at peak efficiency.
Connecting to 800 V-class architectures
Moving to 800 V-class DC distribution will not immediately make 50 V-input IBCs obsolete. An interim approach steps the high-voltage supply down to 50 V at or near the rack, where established unregulated IBCs generate the intermediate bus rails required by downstream VRMs. Longer term, higher-ratio converters could produce 12.5 V, or even 6.25 V directly from the 800 V-class bus, eliminating the 50 V stage. Flex plans to unveil the BMR720 later this year for high-voltage DC (HVDC) IBC applications.
For the power-conversion choices already facing engineers today, Flex Power Designer provides power engineers with a fast read on how different modules are likely to perform within a system. This simulation software enables rapid development and evaluation of different power distribution configurations for an optimized system and a long, happy and efficient coexistence of power and data processing hardware.
In summary, selecting the right IBC architecture for AI data centers is no longer just a question of peak power density. It requires a system-level view of workload behavior, bus voltage, transient response, thermal design, efficiency across operating points and future migration toward higher-voltage distribution. By combining proven 48 / 54 V bus-converter platforms with emerging HVDC solutions and simulation tools, these trade-offs can be evaluated early making it easier to develop power architectures that are ready for the sustained, dynamic demands of next-generation AI infrastructure.
