Incremental gains require exponential efforts
Using Flex’s quarter-bricks as an example, output power capability has increased from approximately 100 W in 2002, to 400 W in 2008, to 1.5 kW by 2020 and up to 2 kW in 2024. For power architects, that increase is not just about wattage: it fundamentally changes current distribution, thermal density, and system-level optimization trade-offs.
This begs the question of what has enabled such increased power density over the years? A major part of the answer is efficiency improvements, as looking at those same products shows a progression from approximately 90% in early models to 97.9% and higher today. However, efficiencies were already near 96% as far back as 2008, so it is abundantly clear that every additional fraction of a percent is hard-won. The reason for this is that moving from 96% efficiency to 97% isn’t just a 1% improvement — rather, it means reducing losses by approximately 26%. This compounds as efficiencies rise, so improving from 97.0% to 97.6% requires losses to be cut by an additional 20%.
These small improvements can have a large impact in high-density AI racks, as they directly affect thermal headroom, airflow requirements, and cooling architecture selection. However, they scale with the component and connection parameters, so gaining that “0.6%” might mean a relatively minor redesign using a new generation of semiconductor devices with lower resistances and faster switching, or it might require a full redesign with an entirely new approach to conversion topology.
For example, achieving these gains has required advances in semiconductor performance and topology optimization. Modern MOSFETs used in synchronous rectifiers now have sub-milliohm on-resistance, smaller package sizes, and lower capacitance, enabling parallel device strategies that reduce conduction and dynamic losses while improving thermal spreading.
Source: Flex analysis (May 2026)
However, as switching device losses are reduced, magnetics and interconnect losses often account for a larger share of the remaining loss budget — making winding resistance and layout-dependent interconnect impedance increasingly important to model.
Efficiency is only part of the story though; the diagram above shows that losses in a 1.5 kW quarter-brick DC/DC converter are still over 3x higher than what could be withstood by early designs. Physics and maximum junction temperatures haven’t changed, so it is clear that thermal management design has seen major advances. However, heat dissipation becomes more challenging as layout density rises in modern systems, where placing a 1.5 kW load close to the converter can lead to significant cross-heating.
At the highest power levels, one solution that has emerged is utilizing the same cooling techniques as the CPU or GPU load for IBCs as well, so the DC/DC might have cooling plates integrated in the top and bottom that can be coupled into the existing liquid cooling system. This also places less reliance on heat conduction through the DC/DC PCB, allowing copper traces and connector pins to pass the higher currents needed.
Optimize the entire system, not just the parts
Designing a power conversion chain from grid-to-chip can technically be done piece-by-piece, but to maximize system efficiency, data center operators must take a more holistic approach. This is because optimizing an individual part of the system may come at the expense of limiting the function of parts upstream or downstream of it, impacting the efficiency of the entire system. It is a cliché for a reason: a great system really is more than the sum of its parts.
Additionally, system-level thinking during design can enable system-level solutions that require multiple parts or components to actively work together. Digital control techniques such as dynamic voltage adjustment and phase shedding can help save energy by improving efficiency under light-load conditions, such as when processors are idling. However, these behaviors must be evaluated under realistic workload profiles, rather than the steady-state assumptions associated with piecemeal system designs.
Don’t just improve your products, improve your approach
The quarter-brick evolution is no longer simply about achieving higher power density. Today’s power design engineers are being asked to reach further, and they need the right tools for the job. Modeling the entire in-rack power-path with tools like 伟创力电源设计器 enables them to compare architecture options, loss allocation between stages, and performance under dynamic workload conditions. They more commonly rely on AI itself for things like simulations of electrical and thermal effects. They source suppliers with grid-to-chip product portfolios to maximize compatibility and reliability. And they apply this approach system-wide, to ensure the best possible efficiency, thermal stability, performance, and uptime.
